Ch368 entwicklungs board pcie bus high-speed echtzeit CH368L-EVT bewertungs karte

Produktbeschreibung

4. Component Description
P1 is the PCIe bus, which is directly inserted into the PCIe slot of the computer.
P2 and P3 are the control bus, data bus, address bus and other signal lines from the local end of CH368 chip.
U1(CH368) is the general-purpose interface chip for PCI-Express bus.
U2(ASM1117) is a 1.8V regulator to provide power for the CH368 core.
U3 (24C02) is the I2C interface EEPROM that customises the ID of the PCIe board for the CH368. if the CH368 is enabled for external ID, it can be used in U2 (24C02).
If the CH368 is enabled with external ID, the vendor ID VendorID and device ID Device ID, etc. can be customised in U2. If
If external ID is not set, the default ID of CH368 will be used and U3 can be omitted.
U4(25F512) is the SPI interface FLASH, which is used to save application data. U4(25F512) is the SPI interface FLASH, used to save application data. It can be omitted when not testing SPI read/write.
U5(74LS273) 8-bit data/address latch is used to latch the data of I/O port.
U6(7805) LDO regulates the voltage to 5V.
JP1 Selects power supply for CH368.
1-2 Shorted CH368 is supplied via PCIE 3.3V, default 2-3 connected.
2-3 shorted CH368 is powered by PCIE 3.3Vaux, when the system is switched off, CH368 will not be powered and can wake up by WAKEIN signal.
WAKEIN signal can be used to wake up the computer after system shutdown (software support is required).
JP2 is the output power supply selection
1-2 Short output 5V to supply power to the peripheral connected to P3. 2-3 Short output 3.3V to supply power to the peripheral connected to P3.
2-3 short to output 3.3V.
F1 is the fuse.
C1, C17 are 100UF power supply decoupling capacitors.

Produktdetails in Bildern

Produkteigenschaften

Markenname

W

Ursprung

CN (Herkunft)

Hochbetriebenes Chemikalienunternehmen

Keine

Zustand

Neu

Typ

Modul

Choice

yes

semi_Choice

yes